An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)
Java Inference Tornado toolkit: High performance LLM inference & serving for the JVM on GPUs
Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
CSV spreadsheets and other material for AI accelerator survey papers
HLS-based Graph Processing Framework on FPGAs
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
Intel® Query Processing Library (Intel® QPL)
Intel® Data Mover Library (Intel® DML)
The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
[TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器
dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
Automatic virtualization of (general) accelerators.
GARDENIA: Graph Analytics Repository for Designing Efficient Next-generation Accelerators
Terminal fleet monitor for GPUs, NPUs, and 13 other accelerator kinds, from utilization down to which pod is using them.
"Optimizing Performance and Energy Efficiency in Massively Parallel Systems" PhD Dissertation repository.
A modular program analysis tool framework for accelerators (NVIDIA, AMD, and DL workloads).
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